RT9008 1 ds9008-01 april 2011 www.richtek.com ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. low dropout linear regulator controller with soft-start general description the RT9008 is a wide input range, low dropout voltage regulator controller with soft-start function. the part drives an external n-mosfet and can operate with vcc power range from 4.5v to 13.5v. with this flexible topology and wide input voltage range, the RT9008 is suitable for various applications. the soft-start function can reduce the input inrush current by adjusting the external capacitor. the RT9008 uses the small footprint package of the sot-23-6. marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area. features z z z z z programmable output voltage z z z z z high current driver for high current fet z z z z z adjustable soft start time z z z z z high accuracy 2% reference voltage z z z z z quick line and load transient response z z z z z enable control z z z z z small footprint package sot-23-6 z z z z z rohs compliant and 100% lead (pb)-free applications z desktop/notebook pc z dsc z processor power sequencing (top view) sot-23-6 pin configurations typical application circuit en gnd fb vcc dri ss 4 23 5 6 out ref r1 + r2 v = v x ( ) r2 vcc en ss dri fb gnd RT9008 r1 r2 c out v in c cc c ss v cc c in 4 23 5 6 1 chip enable v out q1 RT9008 package type e : sot-23-6 lead plating system p : pb free g : green (halogen free and pb free)
RT9008 2 ds9008-01 april 2011 www.richtek.com function block diagram functional pin description pin no. pin name pin function 1 en enable input pin. (active high) 2 gnd ground. 3 fb output voltage feedback reference input. 4 ss soft start control. 5 dri driver output. 6 vcc power supply input. + - shutdown logic 0.8v reference gnd fb ss dri vcc en test circuit vcc en ss dri fb gnd RT9008 c cc v cc 4 2 3 5 6 1 chip enable 1f c fb v fb a v dri 5v 12v figure 1. typical test circuit figure 2. dri source/sink current test circuit vcc en ss dri fb gnd RT9008 r1 r2 c out v in c cc c ss v cc c in 4 23 5 6 1 chip enable v out q1 1f/x7r 100f/ec 100f/ec 1k 2k 100pf/ ceramic phd3055
RT9008 3 ds9008-01 april 2011 www.richtek.com absolute maximum ratings (note 1) z supply input voltage, v cc ----------------------------------------------------------------------------------------------- 15v z enable voltage ------------------------------------------------------------------------------------------------------------- 7v z power dissipation, p d @ t a = 25 c sot-23-6 -------------------------------------------------------------------------------------------------------------------- 0.4w z package thermal resistance (note 2) sot-23-6, ja --------------------------------------------------------------------------------------------------------------- 250 c/w z lead temperature (soldering, 10 sec.) ------------------------------------------------------------------------------- 260 c z junction temperature range -------------------------------------------------------------------------------------------- 150 c z storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ---------------------------------------------------------------------------------------------- 2kv mm (ma chine mode) ------------------------------------------------------------------------------------------------------ 200v recommended operating conditions (note 4) z supply input voltage, v cc ---------------------------------------------------------------------------------------------- 4.5v to 13.5v z enable voltage ------------------------------------------------------------------------------------------------------------ 0v to 5.5v z junction temperature range ------------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range ------------------------------------------------------------------------------------------- ? 40 c to 85 c electrical characteristics (v cc = 12v, t a = 25 c, unless otherwise specified). parameter symbol test condition min typ max unit por threshold voltage v cc_por v cc rising 4.0 4.2 4.5 v por hysteresis v cc_porhy -- 0.2 -- v v cc quiescent current i q v cc = 12v -- 0.3 0.8 ma driver source current i dri_sr v cc = 12v, v dri = 6v 5 -- -- ma driver sink current i dri_sk v cc = 12v, v dri = 6v 5 -- -- ma feedback reference voltage v ref v cc = 12v, v dri = 5v 0.784 0.8 0.816 v reference line regulation v ref_line v cc = 4.5v to 15v -- 3 6 mv amplifier voltage gain v cc = 12v, no load -- 70 db psrr at 100hz, no load psrr v cc = 12v, no load 50 -- db chip enable logic-high voltage v ih 1.4 -- 5.5 en threshold logic-low voltage v il 0 -- 0.4 v shutdown current i shdn v cc = 12v, v en = 0v -- -- 5 a soft-start ss pin source current i ss v ss = 0v 2 5 10 a output turn-on rise time v ou t = 1.2v, c out = 1000 f, c ss = 4.7nf -- 1 -- ms
RT9008 4 ds9008-01 april 2011 www.richtek.com note 1. stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in the natural convection at t a = 25 c on a low effective thermal conductivity single layer test board of jedec 51-3 thermal measurement standard. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
RT9008 5 ds9008-01 april 2011 www.richtek.com typical operating characteristics dri sink current vs. temperature 12 15 18 21 24 27 30 -50 -25 0 25 50 75 100 125 temperature dri sink current (ma) v fb = 1v, v cc = 12v, v dri = 6v ( c) dri source current vs. temperature 35 40 45 50 55 60 -50 -25 0 25 50 75 100 125 temperature dri source current (ma) v fb = 0.6v, v cc = 12v, v dri = 6v ( c) quiescent current vs. temperature 0.00 0.10 0.20 0.30 0.40 0.50 0.60 -50 -25 0 25 50 75 100 125 temperature quiescent current (ma) v in = 1.5v, v cc = 12v ( c) feedback voltage vs. temperature 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 -50 -25 0 25 50 75 100 125 temperature feedback voltage (v) v in = 1.5v, v cc = 12v ( c) sink current vs. dri voltage 0 5 10 15 20 25 0 0.5 1 1.5 2 2.5 3 dri voltage (v) sink current (ma ) refer to test circuit figure 2 v fb = 1v, v cc = 12v v fb = 0.6v, v cc = 12v source current vs. dri voltage 0 10 20 30 40 50 024681012 dri voltage (v) source current (ma)
RT9008 6 ds9008-01 april 2011 www.richtek.com 0 10 -10 1.5 2.5 time (100 s/div) line transient response v out (mv/div) v in (v/div) v in = 1.5v to 2.5v, i load = 100ma c in = 2.2 f, c out = 100 f 0 20 -20 0 5 time (250 s/div) load transient response v out (mv/div) i load (a/div) v in = 2.5v, v out = 1.2v, c in = c out = 100 f time (1ms/div) power off from en v en (5v/div) v out (500mv/div) v in = 5v, v out = 1.2v, i load = 80ma soft start time vs. c ss 0 1000 2000 3000 4000 5000 0 4 8 12 16 20 24 c ss (nf) soft start time (us) en threshold voltage vs. temperature 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 -50 -25 0 25 50 75 100 125 temperature en threshold voltage (v) rising falling ( c) time (500 s/div) power on from en v en (5v/div) v out (500mv/div) v in = 5v, v out = 1.2v, i load = 80ma
RT9008 7 ds9008-01 april 2011 www.richtek.com application information output voltage setting as shown in application circuit, the output voltage can be easy set by the external resistor divider of r1 and r2. out ref r1 vv (1) r2 =+ where v ref is the feedback reference voltage (0.8v typical). chip enable operation pull the en pin low (< 0.4v) to shutdown the device. during shutdown mode, the standby current is lower than 5 a. the external capacitor and load current determine the output voltage decay rate. drive the en pin high (>1.4v) to turn on the device again. soft-start soft-start provides for the monotonic, glitch-free turn-on of the regulator. soft-start limits the input inrush current which may cause a glitch, especially if the source impedance is high. the soft-start is achieved by the controller ramping up to the error amplifier reference input. the RT9008 soft-start time is 190us when the soft-start capacitor is 1nf, 920 s for 4.7nf and 1.9ms for 10nf. capacitors selection careful selection of the external capacitors is highly recommended for the best performance of the RT9008. regarding the supply voltage capacitor (c cc ) connecting a ceramic capacitor 1 f between the v cc and gnd is a must. the capacitor c cc improves the supply voltage stability to provide chip normal operation. as to the input capacitor ,c in, connecting a 100 f between the v in, and gnd is recommended to increase stability. with large capacitor value could result in better performance for both psrr and line transient response. when driving external pass element, a 100 f electrolytic capacitor on the output capacitor (c out ) is recommended for stability. with larger capacitor, the RT9008 can reduce noise the improve load transient response and psrr. mosfet selection and thermal consideration the RT9008 is designed to drive an external n-mosfet pass element. mosfet selection criteria include threshold voltage v gs (v th ), maximum continuous drain current i d, on-resistance r ds(on), maximum drain-to-source voltage v ds and package thermal resistance ja . the most critical specification is the mosfet r ds(on). the maximum allowed r ds(on) can be calculated by the following formula : in out ds(on) load vv r i ? = for example, if the maximum load current is 2a, the input voltage is 1.5v and the output voltage is 1.2v, then r ds(on) = (1.5v ? 1.2v)/2a = 150m . the mosfet's r ds(on) have to be selected to be lower than 150m . a philips phd3055e mosfet with an r ds(on) of 120m (typ.) is a good choice. after that, consider the thermal resistance from junction to ambient ja of the mosfet's package. the power dissipation is calculated by : p d = (v in ? v out ) x i load the thermal resistance from junction to ambient ja can be calculated by : d a j (ja) p ) t (t ? = in this example, p d = (1.5v ? 1.2v) x 2a = 0.6w. the phd3055e's ja is 75 c/w for its d-pak package, which translates to a 45 c temperature rise above ambient. the package provides exposed backsides that directly transfer heat to the pcb board. the RT9008 maximum power dissipation depends on the thermal resitance of the ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = (t j(max) ? t a ) / ja
RT9008 8 ds9008-01 april 2011 www.richtek.com where t j(max) is the maximum operation junction temperature, t a is the ambient temperature and the ja is the junction to ambient resistance. for recommended operating conditions specification of the RT9008, the maximum junction temperature is 125 c. the junction to ambient thermal resistance ja for sot- 23-6 package is 250 c/w on the standard jedec 51-3 single-layer thermal test board. the maximum allowed power dissipation at t a = 25 c can be calculated by following formula : for sot-23-6 package, p d(max) = (125 c ? 25 c)/(250 c/w) = 0.400 w the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja. for RT9008 package, the figure 3 of derating curve allows the designer to see the effect of rising ambient temperature on the maximum power dissipation allowed. figure 3. derating curves for RT9008 package layout considerations there are three critical layout considerations. one is the divider resistors should be located as close to the RT9008 fb pin as possible to minimize noise the second is the placement of capacitors. the c in and c out have to be placed near the n-mosfet for improving performance. the third is the copper area for pass element, it should be as large as possible when the pass element operating under high power situation that could rise the junction temperature. considering the package thermal resistance limitation, the copper area should be large enough to handle the power dissipation shown as figure 4. figure 4. pcb layout guide 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 25 50 75 100 125 ambient temperature (c) power dissipation (w) sot-23-6 single layer pcb v cc dri gnd gnd v out v in en gnd fb vcc dri ss 4 23 5 6 r1 r2 c out c in c cc
RT9008 9 ds9008-01 april 2011 www.richtek.com information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property infringemen t of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications is assumed b y richtek. richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension a a1 e b b d c h l sot-23-6 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.889 1.295 0.031 0.051 a1 0.000 0.152 0.000 0.006 b 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 c 2.591 2.997 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024
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